1. Field of the Invention
The present invention relates to a current control circuit for a display device, and more particularly, to a passive type current control circuit based on high voltage devices.
2. Background of the Related Art
Recently, a flat display market is rapidly developing.
A flat display, developed beginning with liquid crystal displays (LCD), has received much attention. A cathode ray tube (CRT), which had been generally used in the field of display for several decades, is recently being replaced with flat displays such as Plasma Display panel (PDP), Visual Fluorescent Display (VFD), Field Emission Display (FED), Light Emitting Diode (LED), and Electro-luminescence (EL).
Recently, there are two methods for driving display devices. The one is a passive type driving method for use in a simple matrix. The other is an active type driving method for use in a thin film transistor (TFT)-LCD. The active type driving method is a voltage driving type and is mainly used in the PDP and the VFD. The passive type driving method is a current driving type and is mainly used in the FED, the LED and the EL device.
A display device of the simple matrix type is driven in a scan mode. However, since the display device has a limited scanning turn on time, a high voltage is required to obtain desired Luminance.
Meanwhile, the TFT-LCD includes a liquid crystal panel consisting of a plurality of gate lines, a plurality of data lines, and a plurality of pixels arranged in crossing points between the gate lines and the data lines. A driving circuit for the TFT-LCD applies display signals to the liquid crystal panel so that each pixel emits light.
Each pixel includes a TFT having a corresponding gate line (or scan line) connected with a corresponding data line, and a storage capacitor and a display device connected with a source of the TFT in parallel.
A related art passive type driving circuit will be described with reference to the accompanying drawings.
FIG. 1 is a diagram illustrating a related art passive type current driving circuit.
Referring to FIG. 1, an amount of current flowing in a load is controlled using current to voltage (I-V) characteristic of a p type FET Qp1.
To control current to voltage (I-V) characteristic of the P type FET Qp1, an amount of a voltage applied to a gate of the P type FET Qp1 is controlled using resistance to voltage (R-V) characteristic of an N type FET Qs which is a switching element. Maximum current iL that may flow in the load is also controlled.
However, the circuit of FIG. 1 depends on the P type transistor Qp1 and the N type transistor Qs to control the current flowing in the load. Accordingly, there is difficulty in exactly implementing the current control circuit. As an example, if there is any deviation in manufacturing the current control circuit in an integrated circuit type, a problem arises in that there are no solutions to solve the deviation.
In other words, when the integrated circuit is manufactured, a threshold voltage and an effective channel length of the P type transistor Qp1 and the N type transistor Qs may be varied depending on the process change and the location of a wafer. In this case, the current control circuit cannot exactly be implemented.
FIG. 2 is a circuit for compensating the deviation that may occur in an example of FIG. 1. As shown in FIG. 2, a current mirror circuit based on two high voltage devices is used as an element of the current control circuit.
Referring to FIG. 2, the current control circuit includes first and second PMOS transistors Qp1 and Qp2 having a power source voltage Vdd as an input signal and constituting a current mirror 1, a load 2 connected with a drain of the first PMOS transistor Qp1, a variable resistor VR connected between the first PMOS transistor Qp1 and the load 2, and an NMOS transistor Qs connected with a drain of the second PMOS transistor Qp2 and acted as a switching element.
The operation of the current control circuit of the related art flat display device will be described with reference to FIG. 2.
Referring to FIG. 2, the first PMOS transistor Qp1 and the second PMOS transistor Qp2 have the same characteristic as each other.
Meanwhile, the current iL flowing in the load 2 is controlled by the variable resistor VR connected with the first PMOS transistor Qp1.
In other words, when the variable resistor VR is varied to a high resistance value, the current iL flowing in the load 2 becomes smaller. When the variable resistor VR is varied to a low resistance value, the current iL flowing in the load 2 becomes greater.
The current iL flowing in the load 2 can be expressed as follows.                               i          L                =                                            V              dd                        -                          V              s                        -                          V              dss                                            R            i                                              (        1        )            
In the above equation (1), Vdd is a power source voltage, Vagp is a voltage drop between a source and a gate of a PMOS transitor, and Vdss is a voltage difference between a drain and a source of an NMOS transistor.
As described above, the NMOS transistor Qs is used as a switching element and is controlled by an externally input signal Con.
The aforementioned passive type current control circuit has several problems.
The current mirror circuit of the current control circuit includes high voltage devices. The high voltage devices have a nonlinear period in, the current to voltage (I-V) characteristic.
Moreover, a problem may occur in the characteristic of the current control circuit due to turn-on and turn-off characteristics of the high voltage device when a low current period is set or the high voltage devices are turned off.
In other words, when the high voltage devices include the first PMOS transistor Qp1 and the second PMOS transistor Qp2, the NMOS transistor Qc for switching should be provided with the high voltage device. At this time, a voltage of a current set terminal corresponding to the NMOS transistor Qc for switching should properly be controlled to resist a predetermined high voltage.
Accordingly, the present invention is directed to a current control circuit for a display device that substantially obviates one or more problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a control circuit for a display device that can solve problems due to process error when the display device is manufactured.
Another object of the present invention is to provide a current control circuit for a display device that can accurately control current flowing in a load considering nonlinear characteristic of a high voltage device.
Another object of the present invention is to provide a current control circuit for a display device, having a mirror structure with high voltage devices.
Other object of the present invention is to provide a current control circuit for a display device that can prevent leakage current from flowing in a load.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follow and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these objects and other advantages and in accordance with the purpose of the invention, a current control circuit for a display device includes a current mirror circuit consisted of high voltage electronic devices, for outputting current equivalent to a power source voltage to a load, a current set unit connected with the current mirror circuit, for setting a value of the current flowing in the load, and a switching element connected with the current mirror circuit, for switching the operation of the current set unit through an external control signal.
Preferably, the current mirror circuit includes a first PMOS transistor having a first source connected with a power source voltage, a first drain, and a first gate, and a second PMOS transistor having a second source connected with the power source voltage, a second drain connected with the load, and a second gate connected with the first gate.
Preferably, the current control circuit further includes an element for preventing leakage current between the power source voltage and the gates to cut off the leakage current flowing in the load.
Preferably, the current control circuit further includes a level shifter for switching the element for preventing leakage current through the control signal for the switching element.
In the preferred embodiment of the present invention, the current control circuit is provided with the current mirror circuit based on high voltage devices, so that current applied to the display device can accurately be controlled.
It is to be understood that both the foregoing general description and the following detailed description of the present invention are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.